Computer_Architecture_cn
- 1. Computer Architecture Introduction
- 2. Instruction Set Architecture
- 3. Performance Metrics
- 4. Summarizing Performance, Amdahl’s law and Benchmarks
- 5. Fixed Point Arithmetic Unit I
- 6. Fixed Point Arithmetic Unit II
- 7. Floating Point Arithmetic Unit
- 8. Execution of a Complete Instruction – Datapath Implementation
- 9. Execution of a Complete Instruction – Control Flow
- 10. Pipelining – MIPS Implementation
- 11. Pipeline Hazards
- 12. Handling Data Hazards
- 13. Handling Control Hazards
- 14. Dynamic Branch Prediction
- 15. Exception handling and floating point pipelines
- 16. Advanced Concepts of ILP – Dynamic scheduling
- 17. Dynamic scheduling - Example
- 18. Dynamic scheduling – Loop Based Example
- 19. Dynamic scheduling with Speculation
- 20. Exploiting ILP with Software Approaches I
- 21. Memory Hierarchy Design - Basics
- 22. Basics of Cache Memory
- 23. Cache Optimizations I
- 24. Cache Optimizations II
- 25. Cache Optimizations III
- 26. Virtual Memory I
- 27. Virtual Memory II
- 28. Introduction to Multiprocessors
- 29. Cache Coherence I
- 30. Cache Coherence II
- 31. Other Issues with Parallel Processors
- 32. Exploiting Data Level Parallelism
- 33. Case Studies of Multicore Architectures I
- 34. Case Studies of Multicore Architectures II
- 35. Warehouse-Scale Computers
- 36. Summary and Concluding Remarks
- 37. Exploiting ILP with Software Approaches II
- 38. Multiple Issue Processors I
- 39. Multiple Issue Processors II
- 40. Thread Level Parallelism – SMT and CMP
- 41. Summary and Concluding Remarks